Publications

Radiation Hardening By Design (RHBD)

• B. Narasimham, V. Ramachandran, B. L. Bhuva, R. D. Schrimpf, A. F. Witulski, W. T. Holman, L. W. Massengill, J. D. Black, W. H. Robinson, and D. McMorrow, “On-Chip Characterization of Single Event Transient Pulse Widths,” IEEE Transactions on Device and Materials Reliability, vol. 6, pp. 542-49, 2006.
   
• B. Narasimham, B. L. Bhuva, W. T. Holman, R. D. Schrimpf, L.W. Massengill, W. H. Robinson, and A. F. Witulski, “The Effect of Negative Feedback on Single-Event Transient Propagation in Digital Circuits,” IEEE Transactions on Nuclear Science, vol. 53, pp. 3285-90, 2006.
   
• A. R. Duncan, V. Srinivasan, A. L. Sternberg, W. H. Robinson, B. L. Bhuva, and L. W. Massengill, "Comparison of SEUTool Results to Experimental Results in Boeing Radiation Tolerant DSP (BDSP C30)," IEEE Transactions on Nuclear Science, vol. 52, pp. 2224-2230, 2005.
   
• V. Srinivasan, A. L. Sternberg, A. R. Duncan, W. H. Robinson, B. L. Bhuva, and L. W. Massengill, "Single-Event Mitigation in Combinational Logic Using Targeted Data Path Hardening," IEEE Transactions on Nuclear Science, vol. 52, pp. 2516-2523, 2005.
   
• B. Narasimham, V. Ramachandran, B. L. Bhuva, R. D. Schrimpf, A. F. Witulski, W. T. Holman, L. W. Massengill, J. D. Black, and W. H. Robinson, “On-Chip Characterization of Single Event Transient Pulse Widths,” presented at the 2005 Nuclear and Space Radiation Effects Conference (NSREC 2005), Seattle, Washington, July 2005.
   
• A. R. Duncan, V. Srinivasan, A. Sternberg, L. W. Massengill, B. Bhuva, and W. H. Robinson, “The Effect of Frequency and Technology Scaling on Single Event Vulnerability of the Combinational Logic Unit in the LEON2 SPARC V8 Processor,” presented at the 2005 Workshop on Hardened Electronics and Radiation Technology (HEART 2005), Tampa, Florida, March 2005.
   
• D. Lunardini, B. Narasimham, V. Ramachandran, V. Srinivasan, R. D. Schrimpf, and W. H. Robinson, “A Performance Comparison between Hardened-by-Design and Conventional-Design Standard Cells,” presented at the 2004 Workshop on Radiation Effects on Components and Systems, Radiation Hardening Techniques and New Developments, Madrid, Spain, September 2004.

Field Programmable Gate Arrays (FPGAs)

• K. A. LaBel, M. Berg, D. Black, W. H. Robinson, J. Scott, and A. Jordan, “Trade Space Involved with Single Event Upset (SEU) and Transient (SET) Handling of Field Programmable Gate Array (FPGA) Based Systems,” presented at the 2006 Workshop on Hardened Electronics and Radiation Technology (HEART 2006), Santa Clara, California, March 2006.
   
• V. Srinivasan, J. W. Farquharson, W. H. Robinson, and B. L. Bhuva, “Evaluation of Error Detection Strategies for an FPGA-Based Self-Checking Arithmetic and Logic Unit,” presented at the 2005 Military and Aerospace Programmable Logic Devices Conference (MAPLD 2005), Washington, D.C., September 2005.

Focal Plane Processing

• W. H. Robinson and D. S. Wills, "Efficiency Analysis for a Mixed-Signal Focal Plane Processing Architecture," Journal of VLSI Signal Processing, vol. 41, pp. 65-80, 2005.
   
• W. H. Robinson and D. S. Wills, "Analysis of Area-Time Efficiency for an Integrated Focal Plane Architecture," in Proceedings for the 15th Annual Symposium on Electronic Imaging: Science and Technology, Image and Video Communications and Processing 2003, pages 272-283, Santa Clara, California, January 2003.
   
• W. H. Robinson, G. E. Triplett, and D. S. Wills, "Component Modeling for an Integrated Digital Pixel," in Proceedings for the 15th Annual Meeting of the IEEE Lasers and Electro-Optics Society, Display and Imaging Systems, pages 37-38, Glasgow, Scotland, November 2002.
   
• W. H. Robinson and D. S. Wills, "Design of an Integrated Focal Plane Architecture for Efficient Image Processing," in Proceedings for the 15th International Conference on Parallel and Distributed Computing Systems, Multimedia Systems, DSP, and Image Processing Techniques, pages 128-135, Louisville, Kentucky, September 2002.
   
• W. H. Robinson and D. S. Wills, "Cost Modeling for Early Image Processing Applications," in Proceedings for the 2nd Annual International Workshop for Digital and Computational Video, DTV and HDTV Technology, pages 29-34, Tampa, Florida, February 2001.
   
• W. H. Robinson, D. S. Wills, M. Brooke, N. Jokerst, "IRIS: An Integrated, Scalable Focal Plane Architecture," in Proceedings for the 11th Annual Meeting of the IEEE Lasers and Electro-Optics Society, Optical Image Processing, Memory, and 3-D Interconnects, pages 184-185, Orlando, Florida, December 1998.

Engineering Education

• W. H. Robinson, A. O. Austin, D. L. Geddis, D. C. Llewellyn, and M. C. Usselman, "Incorporating Engineering into High School Algebra and Trigonometry: An Initiative of the Georgia Tech Student and Teacher Enhancement Partnership (STEP) Program," in Proceedings for the 2003 ASEE Annual Conference and Exposition, Session 2665 - Mathematics in the Transition, Nashville, Tennessee, June 2003. Nominated for Best Paper Award.